Modulu UMC Sync Cache 256KB (Pipeline Burst Cache, COAST)
Mibgħut minn DeviceLog.com | Posted in SRAM | Posted fuq 2013-01-05
2
Ħafna mainboards, appoġġjat CPU Pentium kmieni, normalment kellhom sync cache ċipep tal-memorja bħala CPU L2 cache. Dan il-modulu tal-cache tas-sinkronizzazzjoni(COAST; Cache Fuq Stick) huwa modulu tal-memorja esterna użat bħala cache addizzjonali tas-CPU L2. Timmassimizza l-prestazzjoni tal-proċessur waqt li l-proċessur ikun qed jistenna struzzjonijiet jew data. L2 cache is used for operating closer to the theoretical limit of the microprocessor.
‘Pipelining’ suggests that the transfers after the first transfer happen before the first transfer has arrived at the processor. ‘Pipleline burst cache’ was developed as an alternative to asynchronous cache and synchronous burst cache.
- Isem tal-Prodott : Modulu UMC Sync Cache 256KB (Version : 1.8)
- Numru tal-Parti : LM 2MV 94V-0
- Manifattur : UMC
- Pajjiż tal-manifattura : Taiwan
- Ibni Sena/Ġimgħa : 1996/39
- Kapaċità tad-Data : 256KB
- Pin count : 80pins
- Karatteristiċi : COAST(Cache Fuq Stick), Pipeline Burst Cache, additional L2 Cache, SRAM
- vultaġġ : 3.3V
- Kompożizzjoni taċ-Ċippa : [UM61(L)3232AF-7 9641S MM4X52] ✕ 2 + [UM61(m)256s-15 9549D RB1121] ✕ 1
You forgot the most common colloquial term for these: COAST (Cache Fuq Stick) :P
I just know the term, COAST(Cache Fuq Stick).
Thank you for your kind comment.