UMC Sync Cache Module 256KB (Pipeline Burst Cache, STRAND)
Sent af DeviceLog.com | Birt í SRAM | birt á 2013-01-05
2
Mörg aðalborð, studd snemma pentium CPU, hafði venjulega sync skyndiminni minniskubba sem CPU L2 skyndiminni. Þessi samstillingar skyndiminni eining(STRAND; Skyndiminni á priki) er ytri minniseining notuð sem viðbótar CPU L2 skyndiminni. Það hámarkar afköst örgjörvans á meðan örgjörvinn bíður eftir leiðbeiningum eða gögnum. L2 cache is used for operating closer to the theoretical limit of the microprocessor.
‘Pipelining’ suggests that the transfers after the first transfer happen before the first transfer has arrived at the processor. ‘Pipleline burst cache’ was developed as an alternative to asynchronous cache and synchronous burst cache.
- vöru Nafn : UMC Sync Cache Module 256KB (Version : 1.8)
- Hlutanúmer : LM 2MV 94V-0
- Framleiðandi : UMC
- Framleiðsluland : Taívan
- Byggingarár/vika : 1996/39
- Gagnageta : 256KB
- Pin count : 80pins
- Eiginleikar : STRAND(Skyndiminni á priki), Pipeline Burst Cache, additional L2 Cache, SRAM
- Spenna : 3.3V
- Flís samsetning : [UM61(L)3232AF-7 9641S MM4X52] ✕ 2 + [UM61(m)256s-15 9549D RB1121] ✕ 1
You forgot the most common colloquial term for these: COAST (Skyndiminni á priki) :P
I just know the term, STRAND(Skyndiminni á priki).
Thank you for your kind comment.